Dimitrios Serpanos has been working on computer architecture, focusing on embedded systems and cybersecurity for more than 30 years. He has conducted extensive research on architecture and design of network systems, security systems and multimedia systems and services. In his work, he gives special emphasis on building real systems and prototypes that are tested in the lab or in the field.
At Princeton University, he worked on scalable shared memory systems and built PRAM/PLAN, a prototype system for a hardware-inconsistent shared memory model, suitable for interconnecting a large number of heterogeneous processor systems equipped with high-performance network adapters over a switch-based network with high-speed serial (fiber) links. The system was operational and used for over a decade for research in the area of scalable shared memory systems.
At IBM Research he led the development of the first field-tried network attachment for mainframes that attached to the mainframe backplane, deviating from the classical IBM channel-based I/O architecture. Additionally, he worked on intelligent adapter architectures, introducing the concept of the specialized protocol/network processor, on high-speed switches, introducing the 2DRR architecture, on high performance routers and bridges, introducing HPTB, on residential network systems, multimedia services and security services.
As a faculty member, collaborating with research centers, he has introduced innovative concepts and architectures for embedded and cyber-physical systems, focusing on safety, security and high performance for network and multimedia systems, industrial systems and network services. He focuses on specific application domains, including smart cities, energy, transport and surveillance.
In the area of network systems, he has introduced a number of innovative network systems architectures including the ATLAS switch, the FIRM and Mutual Priority switch schedulers, the Tripod protocol processor architecture, efficient memory managers and practical switch schedulers using randomization like RoLM.
In the area of hardware security, he has contributed to innovative side-channel attacks as well as defenses, e.g. for Fiat-Shamir systems, to the design of secure embedded processors and co-processors and to the architecture and design of Tiny ORAM.
In embedded and cyber-physical systems safety and security, he has been working on runtime security and safety monitors for application areas ranging from health to industrial processes and automotive systems. With a strong focus on false data injection (FDI) attacks, he has been working on FDI detection and mitigation of cyber-physical systems, mainly in the energy domain, as well as on methods for vulnerability analysis of cyber-physical systems to FDI attacks.
In network and application security, he has introduced trusted hardware-based solutions for IP protection (namely “Spy”, providing also the first proof for TPM need for secure application execution), secure network services, efficient implementations of IPSec, security analysis of network and application protocols, and secure delay-tolerant networks (DTN) with a focus on space Internet.
He has also worked on a number of hardware and software tools, including PDL, a C-based hardware description language that was used for teaching VLSI at Princeton University for several years, Video-on-Demand systems, access control systems, secure hardware and software systems, enterprise systems, etc. Most of these systems have been built, tested and evaluated.